Company News: Page (1) of 1 - 11/07/11 Email this story to a friend. email article Print this page (Article printing at MyDmn.com).print page facebook

EVE Unveils ZeBu-Blade2 Hardware-Assisted Verification Platform

First Emulator Based on 40nm Technology Cuts Costs and Development Time Like a Blade, Offers Unparalleled Speed for Hardware/Software Integration (November 07, 2011)

SAN JOSE, CA -- (Marketwire) -- 11/07/11 -- EVE, the leader in hardware/software co-verification, today unveiled its ZeBu-Blade2 hardware-assisted verification platform, the first member of the ZeBu emulation family based on Xilinx Virtex6-LX760 field programmable gate arrays (FPGAs).

ZeBu-Blade2 is the first emulator for application specific integrated circuits (ASICs) and systems on chip (SoCs) implemented in 40-nanometer (nm) technology. It offers design teams fast execution and attractive pricing for best-in-class hardware/software integration ahead of silicon availability.

"ZeBu-Blade2 slashes costs and development time like a blade," notes Lauro Rizzatti, EVE-USA's general manager and vice president of marketing, who adds that it addresses designers' needs for fast emulation capabilities at up to 40 megahertz (MHz). "ZeBu-Blade2 also provides the lowest cost of ownership through competitive pricing, low deployment and infrastructure costs, and the ability for more design iterations per day."

Offered in two versions, populated with either five or with nine LX760 FPGAs with design capacity of 18- or 32-million ASIC gates, ZeBu-Blade2 is a single user emulator that can handle more than 70% of current ASIC designs, per usage surveys conducted by EVE. It can be deployed in co-emulation with hardware description language (HDL), C, C++, or SystemC-based cycle-level or transaction-level testbenches, or in emulation with synthesizable testbenches and in-circuit-emulation (ICE) driven by target systems. ZeBu-Blade2 features easy setup, fast compilation and fast execution speed in both transaction-based co-emulation and ICE.


ZeBu-Blade2 is supported by a comprehensive set of debugging capabilities including three types of probes -- static, flexible and dynamic -- for optimal analysis, fast waveform generation, interactive read and write access of any memory, and read/force/release of any register. The entire state of the design can be dumped and overwritten in few seconds. Save and restore, SystemVerilog assertions support, and monitors/checkers through fast transactors strengthen ZeBu-Blade2's debugging features. When the emulated design is driven by a target hardware system through ZeBu-Blade2's Direct-ICE interface, which includes 600 non-multiplexed and voltage programmable I/O pins, full-speed debugging can be performed using the built-in logic analyzer. Static and programmable triggering functions can be created using any register or signal in the design.

ZeBu-Blade2 compiles register transfer level (RTL) designs with up to 16 asynchronous primary clocks and unlimited derived clocks using clock-tree routing algorithms that prevent timing violations. The software generates compiled FPGA bitstreams from RTL code in three hours or less using small PC farms.

As with the entire ZeBu family, ZeBu-Blade2 is assisted by a large verification intellectual property (VIP) catalog of memory models, fast hardware transactors for popular protocols, and speed-rate adapters. Custom transactors can be created through EVE's ZEMI-3, a unique SystemVerilog behavioral compiler based on the DPI-C standard compatible with SCEMI 2.0.

As with all previous ZeBu generations, ZeBu-Blade2 is offered in two configurations: Hardware Development Platforms (HDP) and Software Development Platforms (SDP) to trade off hardware debugging capabilities, not necessary when validating embedded software, at half the cost.

Housed in a desktop chassis, with PC-like power consumption, ZeBu-Blade2 is available immediately and includes its zFAST, fast synthesis, and a set of ZeBu transactors. Pricing is available upon request.

ZeBu-Blade2 will be demonstrated publicly for the first time at EDSFair November 16-18 in Yokohama, Japan.

About EVE
EVE is the worldwide leader in hardware/software co-verification solutions, offering fast transaction-based co-emulation and in-circuit emulation, with installations at five of the top six semiconductor companies. EVE products shorten the overall verification cycle of complex integrated circuits and electronic systems designs. Its products can be integrated with transaction-level ESL tools and software debuggers, target hardware systems, as well as Verilog, SystemVerilog and VHDL simulators. EVE is a member of OCP-IP and ARM, Mentor Graphics, Real Intent, Springsoft and Synopsys Partner programs. Follow EVE on Twitter at www.twitter.com/EVETEAM and on Facebook at: http://tiny.cc/hykzr. Its United States headquarters is in San Jose, Calif. Telephone: (408) 457-3200. Facsimile: (408) 457-3299. Corporate headquarters is in Palaiseau, France. Telephone: (33) 1 64.53.27.30. Fax: (33) 1 64.53.27.40. Email: info@eve-team.com. Website: www.eve-team.com.

EVE acknowledges trademarks or registered trademarks of other organizations for their respective products and services.

For more information, contact:
Lauro Rizzatti
General Manager of EVE USA
(408) 457-3201
Email Contact

Nanette Collins
Public Relations for EVE
(617) 437-1822
Email Contact


Copyright @ Marketwire

Page: 1


Related Keywords: EVE, France, USA, Japan, Marketwire, , Computer Science, Family, Other,

HOT THREADS on DMN Forums
Content-type: text/html  Rss  Add to Google Reader or
Homepage    Add to My AOL  Add to Excite MIX  Subscribe in
NewsGator Online 
Real-Time - what users are saying - Right Now!

Our Privacy Policy --- @ Copyright, 2015 Digital Media Online, All Rights Reserved